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Updated: Jun 7, 2026
09:49
In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
Published on: May 13, 2020
Read/write schemes analysis for novel complementary resistive switches in passive crossbar memory arrays
Shimeng Yu1, Jiale Liang, Yi Wu
1Center for Integrated Systems and Department of Electrical Engineering, Stanford University, Stanford, CA 94305, USA. simonyu@stanford.edu
Nanotechnology
|October 26, 2010
Summary
Complementary resistive switches offer a solution for sneak-path issues in memory arrays. Modeling reveals a trade-off between read/write voltages, with cell disturbance limiting writing speed.
Area of Science:
- Materials Science
- Electrical Engineering
- Computer Engineering
Background:
- Passive crossbar memory arrays face challenges with sneak-path currents.
- Complementary resistive switches (CRSs) have been proposed as a solution.
Purpose of the Study:
- To model and analyze the switching dynamics of CRSs.
- To evaluate the read/write schemes of CRS-based memory arrays.
Main Methods:
- Development of a computational model for CRS switching dynamics.
- Validation of the model using experimental data.
- Analysis of read/write voltage windows and cell disturbance.
Main Results:
- The model accurately captures CRS switching behavior.
- A critical trade-off exists between read and write voltage windows.
- Preventing disturbance on unselected cells is crucial for functionality.
Conclusions:
- CRS technology shows promise for mitigating sneak-path problems.
- Design constraints impact writing speed and operational parameters.
- Further optimization is needed for practical memory array applications.
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