Read/write schemes analysis for novel complementary resistive switches in passive crossbar memory arrays
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Updated: Jun 7, 2026

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
Published on: May 13, 2020
Shimeng Yu1, Jiale Liang, Yi Wu
1Center for Integrated Systems and Department of Electrical Engineering, Stanford University, Stanford, CA 94305, USA. simonyu@stanford.edu
Abstract:
Recently a prototype of complementary resistive switches has been proposed to solve the sneak-path problem in passive crossbar memory arrays. To further evaluate the potential of this novel cell structure for practical applications, we present a modeling analysis to capture its switching dynamics and analyze its unique read/write schemes. The model is corroborated by experimental data. We found a trade-off between the read voltage window and write voltage window. The constraint from avoiding disturbance on unselected cells is critical for proper functionality, which in turn limits the writing speed.
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