Experimental demonstration of a defect-tolerant nanocrossbar demultiplexer

Ultradense memory and logic circuits fabricated at local densities exceeding 100 × 10(9) cross-points per cm(2) have recently been demonstrated with nanowire crossbar arrays. Practical implementation of such nanocrossbar circuitry, however, requires effective demultiplexing to solve the problem of electrically addressing individual nanowires within an array. Importantly, such a demultiplexer (demux) must also be tolerant of the potentially high defect rates inherent to nanoscale circuit fabrication. We have built a 50 nm half-pitch nanocrossbar circuit using imprint lithography and configured it for a demux application. Utilizing a class of Hamming codes in the hardware design, we experimentally demonstrate defect-tolerant demux operations on a 12 × 8 nanocrossbar array with up to two stuck-open defects per addressed line.