Gold nanowires fabricated by immersion plating

Area of Science:

• Materials Science
• Nanotechnology
• Surface Chemistry

Background:

• Investigating the growth mechanisms of oriented gold (Au) nanowires is crucial for advanced electronic applications.
• Immersion plating offers a method for fabricating nanostructures with controlled morphology.

Purpose of the Study:

• To investigate the growth mechanism of oriented Au nanowires fabricated by immersion plating on different silicon substrates.
• To analyze the structural and electrical properties of the fabricated Au nanowires.

Main Methods:

• Fabrication of Au nanowires on n-type crystal silicon (c-Si) and amorphous silicon (a-Si) using electron-beam patterned nanotrenches and immersion plating in HAuCl(4)/HF.
• Characterization using scanning electron microscopy (SEM) and grazing incident X-ray diffraction (GIXRD).
• Electrical resistivity measurements using atomic force microscopy (AFM) in contact mode, including post-annealing analysis.

Main Results:

• Au nanowire growth on c-Si resulted in voids and clusters due to limited nucleation sites.
• Continuous Au nanowires with grain sizes of 10-50 nm were formed on a-Si.
• Resistivity of Au nanowires on a-Si (105 nm width) was 4.4-6.5 µΩ cm, reduced to 3.0-3.9 µΩ cm after annealing at 200°C.
• Annealing increased Au grain size to 50-100 nm.

Conclusions:

• Amorphous silicon provides a superior substrate for continuous gold nanowire formation via immersion plating compared to crystal silicon.
• Post-fabrication annealing significantly enhances the electrical conductivity of gold nanowires on amorphous silicon.
• The findings suggest potential for using these fabricated gold nanowires in electronic devices.