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A novel algorithm combining oversampling and digital lock-in amplifier of high speed and precision
1School of Precision Instrument and Opto-Electronics Engineering, Tianjin University, Tianjin 300072, People's Republic of China.
The Review of Scientific Instruments
|October 7, 2011
Summary
This study introduces a new algorithm for high-speed digital lock-in detection. It enhances weak signal detection accuracy and speed, making it suitable for general microprocessors.
Area of Science:
- Electrical Engineering
- Signal Processing
Background:
- Standard digital lock-in detection requires high-performance processors due to extensive arithmetic operations.
- Real-time implementation of these algorithms is computationally demanding.
Purpose of the Study:
- To develop a novel, high-speed algorithm for digital lock-in detection.
- To improve detection accuracy and reduce computational load for real-time weak signal detection.
Main Methods:
- Integration of oversampling and downsampling techniques.
- Implementation of a phase-sensitive detector using addition/subtraction on four points.
- Introduction of a correction factor to enhance amplitude calculation accuracy.
Main Results:
- The novel algorithm significantly speeds up digital lock-in detection calculations.
- Effective noise interference removal and improved detection accuracy were achieved.
- Simulation and experimental results confirm high precision and unprecedented speed.
Conclusions:
- The new algorithm offers a high-precision, high-speed solution for digital lock-in detection.
- It is suitable for real-time weak signal detection on general microprocessors, not limited to DSPs.
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