Field programmable gate array based parallel strapdown algorithm design for strapdown inertial navigation systems.

Area of Science:

• Navigation Systems
• Inertial Navigation
• Aerospace Engineering

Background:

• Strapdown algorithms are crucial for inertial navigation systems (INS).
• Existing algorithms face limitations in accurately compensating for high-frequency motion effects.
• Real-time processing in high-dynamic environments remains a challenge.

Purpose of the Study:

• To present a generalized optimum strapdown algorithm with advanced coning and sculling compensation.
• To enable independent adjustment of compensation rates for improved accuracy.
• To develop and evaluate a parallelized FPGA implementation for real-time performance.

Main Methods:

• A single-speed updating structure for position, velocity, and attitude.
• Coning and sculling compensation rates decoupled from sensor sample counts.
• Algorithm parallelization for implementation on a Field-Programmable Gate Array (FPGA).
• Performance evaluation using fighter aircraft data on FPGA and Digital Signal Processor (DSP) platforms.

Main Results:

• The new algorithm accurately accounts for high-frequency angular rate and acceleration effects.
• Increased updating rates for compensation improve system accuracy without compromising sensor sampling.
• The parallel FPGA implementation significantly reduces algorithm execution time compared to DSP platforms.
• Achieved real-time and high-precision performance in high-dynamic environments.

Conclusions:

• The generalized optimum strapdown algorithm offers superior accuracy and flexibility.
• FPGA implementation provides a viable solution for real-time, high-precision INS in demanding applications.
• The proposed method surpasses existing DSP-based implementations in speed and efficiency.