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Updated: May 24, 2026
07:12
A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
Simulation study on a new dual-material nanowire MOS surrounding-gate transistor
Wang Zhou1, Lining Zhang, Lin Chen
1Electrical Engineering and Computer Science, Peking University, Beijing 100871, China.
Journal of Nanoscience and Nanotechnology
|March 14, 2012
Summary
A new dual-material surrounding-gate field-effect transistor offers enhanced performance. This novel nanowire transistor design improves driving current and suppresses short-channel effects for better electronic device applications.
Area of Science:
- Semiconductor device physics
- Nanotechnology
- Materials science
Background:
- Surrounding-gate transistors improve channel electrostatic control.
- Dual-material gates enhance current and short-channel performance compared to split-gate designs.
Purpose of the Study:
- To propose and numerically demonstrate a novel dual-material surrounding-gate field-effect transistor.
- To analyze the performance characteristics of this new device structure.
Main Methods:
- Three-dimensional device simulations using Sentaurus Device.
- Numerical analysis of transistor performance metrics.
Main Results:
- The proposed dual-material surrounding-gate transistor exhibits higher driving current.
- A high ON/OFF current ratio (ION/IOFF) was achieved.
- Short-channel effects were effectively suppressed.
Conclusions:
- The novel dual-material surrounding-gate nanowire transistor demonstrates superior performance.
- This device structure is promising for advanced integrated circuits and electronic applications.
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