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Related Concept Videos

MOS Capacitor01:25

MOS Capacitor

A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
Metal-Semiconductor Junctions01:24

Metal-Semiconductor Junctions

The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The semiconductor's...
MOSFET01:16

MOSFET

The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) plays a pivotal role in modern electronics thanks to its versatility and efficiency in controlling electrical currents. This device, also known as IGFET, MISFET, and MOSFET, has three main terminals: the Source, Drain, and Gate. MOSFETs are classified into n-channel or p-channel types based on the doping characteristics of their substrate and the source or drain regions.
In an n-MOSFET, the structure includes n-type source and drain...
Semiconductors01:22

Semiconductors

There is variation in the electrical conductivity of materials - metals, semiconductors, and insulators that are showcased with the help of the energy band diagrams.
Metals such as copper (Cu), zinc (Zn), or lead (Pb) have low resistivity and feature conduction bands that are either not fully occupied or overlap with the valence band, making a bandgap non-existent. This allows electrons in the highest energy levels of the valence band to easily transition to the conduction band upon gaining...
Types of Semiconductors01:20

Types of Semiconductors

Intrinsic semiconductors are highly pure materials with no impurities. At absolute zero, these semiconductors behave as perfect insulators because all the valence electrons are bound, and the conduction band is empty, disallowing electrical conduction. The Fermi level is a concept used to describe the probability of occupancy of energy levels by electrons at thermal equilibrium. In intrinsic semiconductors, the Fermi level is positioned at the midpoint of the energy gap at absolute zero. When...
Biasing of Metal-Semiconductor Junctions01:27

Biasing of Metal-Semiconductor Junctions

Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...

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Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping
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Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

Published on: June 3, 2015

III-V complementary metal-oxide-semiconductor electronics on silicon substrates.

Junghyo Nah1, Hui Fang, Chuan Wang

  • 1Electrical Engineering and Computer Sciences, University of California, Berkeley, California 94720, United States.

Nano Letters
|June 15, 2012
PubMed
Summary

Researchers developed a novel III-V-on-insulator (XOI) technology to integrate high-mobility complementary transistors. This breakthrough enables advanced III-V complementary metal-oxide-semiconductor (CMOS) logic operations on a single substrate, surpassing silicon performance.

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Last Updated: May 21, 2026

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09:18

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12:38

Soft Lithographic Functionalization and Patterning Oxide-free Silicon and Germanium

Published on: December 16, 2011

Area of Science:

  • Materials Science
  • Semiconductor Physics
  • Nanotechnology

Background:

  • Integrating high-mobility complementary transistors on a single substrate is crucial for advancing III-V electronics.
  • Significant lattice mismatch between optimal p- and n-type III-V semiconductors hinders monolithic integration.

Purpose of the Study:

  • To develop a method for heterogeneous assembly of III-V compound semiconductors on silicon substrates.
  • To demonstrate the feasibility of III-V complementary metal-oxide-semiconductor (CMOS) technology using ultrathin III-V layers.

Main Methods:

  • A two-step epitaxial layer transfer process was employed to create III-V-on-insulator (XOI) structures.
  • Ultrathin body InAs (13 nm) and InGaSb (7 nm) layers were used for n- and p-type metal-oxide-semiconductor field-effect transistors (MOSFETs).

Main Results:

  • Achieved peak effective mobilities of ~1190 cm²/Vs for electrons and ~370 cm²/Vs for holes, exceeding state-of-the-art silicon MOSFETs.
  • Successfully fabricated and demonstrated proof-of-concept III-V CMOS NOT and NAND logic gates.

Conclusions:

  • The XOI platform provides a viable route for heterogeneous integration of high-performance III-V transistors.
  • This technology paves the way for next-generation electronic devices with enhanced performance characteristics.