High performance horizontal gate-all-around silicon nanowire field-effect transistors

Area of Science:

• Nanotechnology
• Materials Science
• Electrical Engineering

Background:

• Semiconducting nanowires are key components for submicron electrical applications.
• Nanomaterials offer alternatives to traditional metal-oxide-semiconductor devices.
• Horizontal nanowire fabrication presents unique challenges.

Purpose of the Study:

• To demonstrate a new technique for fabricating horizontally suspended silicon nanowires.
• To integrate these nanowires into gate-all-around field-effect transistors.
• To characterize the electrical performance of the fabricated transistors.

Main Methods:

• Fabrication of horizontally suspended silicon nanowires.
• Integration into gate-all-around field-effect transistor architecture.
• Electrical measurements and performance characterization.

Main Results:

• Achieved high on current density (~150 μA μm(-1)).
• Demonstrated a high on/off current ratio (10^6).
• Observed low threshold voltage (~ -0.4 V) and low subthreshold slope (~100 mV/dec).
• Recorded high transconductance (g(m) ~ 9.5 μS).

Conclusions:

• The novel fabrication technique yields high-performance transistors.
• Tight electrostatic coupling from the gate significantly reduces Schottky-barrier effective height.
• These silicon nanowire transistors show great promise for advanced electronic applications.