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Steven Chuang1, Qun Gao, Rehan Kapadia

  • 1Electrical Engineering and Computer Sciences, University of California, Berkeley, California 94720, USA.

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Electron transport in indium arsenide nanowire transistors approaches ballistic conditions at room temperature. This is due to a long electron mean free path, primarily limited by surface roughness scattering.

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Area of Science:

  • Materials Science
  • Condensed Matter Physics
  • Nanotechnology

Background:

  • Indium arsenide (InAs) nanowires (NWs) are promising for advanced electronic devices.
  • Understanding electron transport mechanisms is crucial for optimizing device performance.

Purpose of the Study:

  • To experimentally observe and theoretically examine ballistic electron transport in top-gated InAs NW transistors at room temperature.
  • To determine the electron mean free path and identify dominant scattering mechanisms.

Main Methods:

  • Length-dependent transport measurements were performed on InAs NW transistors.
  • Fermi's golden rule and Schrödinger-Poisson simulations were used for theoretical analysis.
  • Surface scattering potential was calculated to assess the mean free path.

Main Results:

  • Ballistic electron transport was observed at room temperature.
  • The low-field electron mean free path was extracted to be approximately 150 nm.
  • Mean free path was found to be temperature-independent, indicating surface roughness scattering dominance.
  • Near-ballistic transport (~80% of ballistic limit) was achieved in 60 nm channel length transistors.

Conclusions:

  • InAs NWs exhibit a long electron mean free path, enabling near-ballistic transport at room temperature.
  • Surface roughness scattering is the primary limitation for electron transport in these devices.
  • The findings support the potential of InAs NWs for high-performance electronic applications.