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Published on: November 12, 2019
Event management for large scale event-driven digital hardware spiking neural networks
Louis-Charles Caron1, Michiel D'Haene, Frédéric Mailhot
1NECOTIS, Université de Sherbrooke, 2500 boul. de l'Université, Sherbrooke (Québec), J1K 2R1, Canada. lcaron@ensta.fr
Summary
This study introduces a novel structured heap queue for efficient event management in digital hardware spiking neural networks (SNNs). This innovation enables scalable, event-driven neuromorphic systems with improved performance.
Area of Science:
- Neuromorphic Engineering
- Computer Science
- Computational Neuroscience
Background:
- The growing interest in brain-like computation has spurred the development of numerous neuromorphic systems.
- Spiking Neural Networks (SNNs), event-driven simulations, and digital hardware architectures are key areas of focus.
- A significant gap exists between the software popularity of event-driven SNNs and their digital hardware implementations due to poor scalability of existing event management solutions.
Purpose of the Study:
- To introduce a novel pipelined digital hardware data structure, the structured heap queue, for efficient event management.
- To demonstrate the suitability of the structured heap queue for large-scale digital hardware event-driven SNNs.
- To address the scalability limitations of current hardware solutions for event management in neuromorphic systems.
Main Methods:
- Introduction of the structured heap queue, a pipelined digital hardware data structure.
- Demonstration of the structured heap queue's performance on a field-programmable gate array (FPGA).
- Implementation of a large-scale SNN comprising 65,536 neurons and 513,184 synapses for an image segmentation task.
Main Results:
- The structured heap queue exhibits linear scaling for memory, logarithmic scaling for logic resources, and constant scaling for processing time with an increasing number of events.
- Events are processed at a rate of 1 every 7 clock cycles.
- A 406×158 pixel image was successfully segmented in 200 ms using the implemented SNN.
Conclusions:
- The structured heap queue provides a scalable solution for event management in digital hardware event-driven SNNs.
- This data structure facilitates the efficient implementation of large-scale neuromorphic systems.
- The demonstrated FPGA implementation highlights the practical viability and performance benefits of the structured heap queue for real-world applications like image segmentation.
Keywords:
Event-driven simulationField-programmable gate arrayNeuromorphic engineeringPipelined heap queueSpiking neural network
