Configurable hardware integrate and fire neurons for sparse approximation.

Area of Science:

• Computational Neuroscience
• Analog Circuit Design
• Optimization Algorithms

Background:

• Sparse approximation is crucial for signal and image processing.
• Existing digital solutions can be computationally intensive.
• Analog implementations offer potential for speed and power efficiency.

Purpose of the Study:

• To propose and implement a Hopfield-Network-like system of integrate and fire (IF) neurons for sparse approximation.
• To demonstrate a scalable analog system architecture for solving L1 sparse approximation problems.
• To compare the performance of the analog spiking system with digital and non-spiking analog approaches.

Main Methods:

• Utilized the Locally Competitive Algorithm (LCA) for overcomplete L1 sparse approximation.
• Designed IF neurons with nonlinear firing and current-based synapses for linear computation.
• Implemented an 18-neuron network on a RASP 2.9v Field Programmable Analog Array (FPAA), using over 1400 floating gates.

Main Results:

• The analog circuit accurately reproduced digital optimization outputs, with 4.8% RMS error and 1.7% higher objective cost.
• The system achieved rapid convergence in 25 μs, consuming 559 μA at 2.4 V.
• Scalability projections indicate favorable performance against state-of-the-art digital and non-spiking analog solutions for larger systems (N=1000).

Conclusions:

• The spiking LCA implemented on an FPAA provides an efficient analog solution for sparse approximation.
• This approach demonstrates significant potential for low-power, high-speed signal and image processing.
• The developed system represents the largest to date programmed on an FPAA, validating its scalability and effectiveness.