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A Low-Power Blocking-Capacitor-Free Charge-Balanced Electrode-Stimulator Chip With Less Than 6 nA DC Error for 1-mA

Ji-Jon Sit, R Sarpeshkar

    IEEE Transactions on Biomedical Circuits and Systems
    |July 16, 2013
    PubMed
    Summary
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    This study presents a novel electrode-stimulator chip for neural implants, eliminating the need for large DC blocking capacitors. The chip achieves precise charge-balanced stimulation, significantly reducing size and cost for devices like cochlear implants.

    Area of Science:

    • Biomedical Engineering
    • Neurotechnology
    • Implantable Devices

    Background:

    • Large DC blocking capacitors are a significant limitation in the miniaturization and cost-effectiveness of neural implants.
    • Existing neural implant technologies face challenges in achieving precise charge balance, impacting safety and efficacy.

    Purpose of the Study:

    • To develop an electrode-stimulator chip that eliminates the requirement for large DC blocking capacitors in neural implants.
    • To achieve precise charge-balanced stimulation with minimal DC error, below industry safety standards.

    Main Methods:

    • Implementation of an electrode-stimulator chip utilizing dynamic current balancing to minimize positive and negative current phase mismatch to 0.4%.
    • Inclusion of a shorting phase of at least 1 ms between current pulses to further reduce DC error.

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  • Fabrication using a 0.7-μm AMI high voltage process.

    • Main Results:

    • The developed chip achieves precise charge-balanced stimulation with less than 6 nA of DC error, significantly below the 25 nA cochlear implant safety limit.
    • Demonstrated a power consumption of 47 μW per channel when biasing power is shared among 16 channels.
    • Successfully removed the need for large DC blocking capacitors.

    Conclusions:

    • The novel electrode-stimulator chip offers a breakthrough in neural implant design by eliminating bulky capacitors.
    • This advancement enables smaller, more cost-effective, and safer neural implants, particularly benefiting cochlear implant applications.
    • The chip's low power consumption and precise charge balancing contribute to improved performance and patient outcomes.