Suppression of inhibit cell Vth disturbance in three dimensional stack NAND flash memory

Area of Science:

• Electrical Engineering
• Materials Science
• Semiconductor Device Physics

Background:

• 3D stack NAND flash memory is crucial for high-density data storage.
• Hot carrier injection causes threshold voltage (Vth) disturbance in NAND flash memory, impacting reliability.
• Program inhibit operations in 3D NAND are susceptible to Vth shifts due to channel boosting.

Purpose of the Study:

• To characterize and suppress threshold voltage (Vth) disturbance in 3D stack NAND flash memory.
• To investigate the hot carrier injection mechanism affecting program inhibit strings.
• To propose and validate a novel method for mitigating Vth shifts.

Main Methods:

• Characterization of Vth disturbance in 3D stack NAND during program inhibit.
• Analysis of hot carrier generation caused by potential differences in the channel and bit line selection device.
• Implementation of a new method involving pre-channel cut-off electron injection at the edge word line (WL).

Main Results:

• The proposed method effectively suppresses hot carrier generation.
• Large disturbed cell Vth in inhibit strings for high Vpass is controlled.
• Reliable cell operations are maintained at higher pass voltages during program and read operations.

Conclusions:

• The novel electron injection method significantly reduces Vth disturbance in 3D stack NAND.
• This technique enhances the reliability and performance of NAND flash memory devices.
• The findings enable higher operating voltages, improving overall device efficiency.