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Characteristics of junctionless charge trap flash memory for 3D stacked NAND flash
Jinho Oh1, Heedo Na, Sunghoon Park
1Department of Materials Science and Engineering, Yonsei University, Seoul 120-749, Korea.
Abstract:
The electrical characteristics of tunnel barrier engineered-charge trap flash (TBE-CTF) memory devices with junctionless (JL) source and drain (S/D) were investigated. The JL structure is composed of an n(+)-poly-Si based ultra-thin channel and S/D with identical doping concentrations. The band engineered Hf-silicate/Al2O3 tunnel barrier stack was applied to a JL-TBE-CTF memory device in order to enhance the field sensitivity. The Hf-silicate/Al2O3 tunnel barrier, HfO2 trap layer, and Al2O3 blocking layer were deposited by atomic layer deposition. The fabricated device exhibited a large memory window of 9.43 V, as well as high programming and erasing speeds. Moreover, it also showed adequate retention times and endurance properties. Hence, the JL-TBE-CTF memory (which has a low process complexity) is expected to be an appropriate structure for 3D stacked ultra-high density memory applications.
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