A generalized analog implementation of piecewise linear neuron models using CCII building blocks.

Area of Science:

• Neuroscience
• Analog Circuit Design
• VLSI

Background:

• Spiking neuron models are crucial for understanding neural computation.
• Existing analog implementations often lack reconfigurability after fabrication.
• Second-generation current conveyor (CCII) offers a versatile building block for analog circuits.

Purpose of the Study:

• To present reconfigurable analog implementations of piecewise linear spiking neuron models.
• To demonstrate the ability to achieve diverse neuron behaviors using a single circuit topology.
• To evaluate the feasibility and cost-effectiveness for large-scale hardware implementations.

Main Methods:

• Utilized second-generation current conveyor (CCII) building blocks for circuit design.
• Employed a single topology with adjustable reference current and voltage sources for reconfigurability.
• Investigated model performance, area, and accuracy trade-offs.
• Performed simulations using CMOS 350 nm technology.

Main Results:

• Successfully demonstrated reconfigurable analog circuits capable of producing different spiking neuron behaviors.
• Showcased that circuit behavior can be altered without physical modifications (W/L changes).
• Identified performance, area, and accuracy trade-offs for optimized implementations.
• Presented simulation results for various neuron behaviors.

Conclusions:

• The proposed CCII-based circuits offer a flexible and cost-effective approach for implementing spiking neuron models.
• Reconfigurability achieved through parameter tuning is a viable strategy for analog neural hardware.
• The study provides insights into optimizing analog neural circuit design for large-scale applications.