Jove
Visualize
Contact Us
JoVE
x logofacebook logolinkedin logoyoutube logo
ABOUT JoVE
OverviewLeadershipBlogJoVE Help Center
AUTHORS
Publishing ProcessEditorial BoardScope & PoliciesPeer ReviewFAQSubmit
LIBRARIANS
TestimonialsSubscriptionsAccessResourcesLibrary Advisory BoardFAQ
RESEARCH
JoVE JournalMethods CollectionsJoVE Encyclopedia of ExperimentsArchive
EDUCATION
JoVE CoreJoVE BusinessJoVE Science EducationJoVE Lab ManualFaculty Resource CenterFaculty Site
Terms & Conditions of Use
Privacy Policy
Policies

Related Concept Videos

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by
Same author

Electroluminescent perovskite QD-based neural networks for energy-efficient and accelerate multitasking learning.

Science advances·2026
Same author

A Vertical Molecular Synaptic Transistor with Redox-Induced Analog States.

ACS nano·2025
Same author

Nonvolatile Transition of Molecular Orbital Gating for Reconfigurable Molecular Ambipolar Transistor Switch.

ACS nano·2025
Same author

Polarization-sensitive in-sensor computing in chiral organic integrated 2D p-n heterostructures for mixed-multimodal image processing.

Nature communications·2025
Same author

Electrochemiluminescent tactile visual synapse enabling in situ health monitoring.

Nature materials·2025
Same author

Analysis and fully memristor-based reservoir computing for temporal data classification.

Neural networks : the official journal of the International Neural Network Society·2024

Related Experiment Video

Updated: May 3, 2026

A Fabrication and Measurement Method for a Flexible Ferroelectric Element Based on Van Der Waals Heteroepitaxy
10:40

A Fabrication and Measurement Method for a Flexible Ferroelectric Element Based on Van Der Waals Heteroepitaxy

Published on: April 8, 2018

7.6K

Conducting-interlayer SiOx memory devices on rigid and flexible substrates.

Gunuk Wang1, Abdul-Rahman O Raji, Jae-Hwang Lee

  • 1Department of Chemistry, ‡Smalley Institute for Nanoscale Science and Technology, §Department of Mechanical Engineering and Materials Science, and ⊥Department of Computer Science, Rice University , 6100 Main Street, Houston, Texas 77005, United States.

ACS Nano
|January 23, 2014
PubMed
Summary
This summary is machine-generated.

Conducting interlayers like palladium significantly improve silicon oxide (SiOx) memory devices

More Related Videos

Fabrication of Flexible Image Sensor Based on Lateral NIPIN Phototransistors
09:59

Fabrication of Flexible Image Sensor Based on Lateral NIPIN Phototransistors

Published on: June 23, 2018

7.3K
In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
09:49

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

Published on: May 13, 2020

3.2K

Related Experiment Videos

Last Updated: May 3, 2026

A Fabrication and Measurement Method for a Flexible Ferroelectric Element Based on Van Der Waals Heteroepitaxy
10:40

A Fabrication and Measurement Method for a Flexible Ferroelectric Element Based on Van Der Waals Heteroepitaxy

Published on: April 8, 2018

7.6K
Fabrication of Flexible Image Sensor Based on Lateral NIPIN Phototransistors
09:59

Fabrication of Flexible Image Sensor Based on Lateral NIPIN Phototransistors

Published on: June 23, 2018

7.3K
In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
09:49

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

Published on: May 13, 2020

3.2K

Area of Science:

  • Materials Science
  • Electrical Engineering
  • Nanotechnology

Background:

  • Resistive switching memory devices are crucial for next-generation electronics.
  • Optimizing the switching performance and fabrication processes of silicon oxide (SiOx) based memory is essential.

Purpose of the Study:

  • To investigate the impact of conducting interlayers on the performance of SiOx memory devices.
  • To explore low-temperature fabrication methods for enhanced memory applications.

Main Methods:

  • Fabrication of SiOx memory devices with various conducting interlayers (Pd, Ti, carbon, multilayer graphene) at room temperature.
  • Characterization of switching performance, including electroforming and threshold voltages.
  • Evaluation of device performance on flexible substrates.

Main Results:

  • Palladium (Pd)-interlayer SiOx devices showed reduced electroforming and threshold voltages, with improvements increasing with more Pd layers.
  • Devices fabricated on flexible substrates maintained stable switching properties and low electroforming voltages.
  • A switching mechanism involving the formation of conducting paths at SiOx film edges was proposed.

Conclusions:

  • Conducting interlayers, particularly Pd, enhance SiOx memory device performance.
  • Room-temperature fabrication is feasible, even for flexible memory applications.
  • The proposed mechanism provides insight into optimizing SiOx-based resistive switching memory.