Nanowire systems: technology and design.

Area of Science:

• Nanoelectronics
• Solid-state physics
• Integrated circuit design

Background:

• Nanosystems leverage nanoelectronic devices for large-scale integration.
• Standard complementary metal-oxide-semiconductor (CMOS) technology faces limitations in expressive power for complex logic.
• Vertically stacked nanowire field-effect transistors (FETs) offer potential for enhanced functionality.

Purpose of the Study:

• To investigate and fabricate double independent gate, vertically stacked nanowire FETs.
• To demonstrate the electrically programmable polarity and exclusive OR (XOR) operation capabilities of these devices.
• To explore the design of efficient logic gates and nanowire systems using this technology.

Main Methods:

• Fabrication of vertically stacked nanowire FETs with gate-all-around structures (20 nm diameter).
• Experimental evaluation of device characteristics, focusing on carrier selectivity and ambipolar behavior control.
• Design and organization of logic gates as tiles for creating regular arrays of nanowire systems.

Main Results:

• Successful fabrication and evaluation of double independent gate nanowire FETs.
• Demonstration of selective carrier enablement to control ambipolar behavior.
• Realization of transistors functioning as electrically programmable polarity switches, performing exclusive OR operations.
• Achieved higher expressive power compared to standard CMOS, enabling more efficient logic gates.

Conclusions:

• Double independent gate nanowire FETs offer enhanced functionality and efficiency over traditional CMOS.
• These devices can be utilized to build advanced, high-performance digital systems through regular array architectures.
• The developed technology and design tools pave the way for next-generation nanosystems.