Compact low-power cortical recording architecture for compressive multichannel data acquisition.

Area of Science:

• Biomedical Engineering
• Signal Processing
• Integrated Circuit Design

Background:

• Compressive sensing (CS) offers sub-Nyquist sampling for sparse biological signals.
• Large-scale CS implementations face hardware intensity and area overhead challenges.
• Existing multichannel systems require significant area compared to conventional methods.

Purpose of the Study:

• To develop an area- and power-efficient compressive recording approach for implantable cortical signal systems.
• To address the hardware intensity issues of multichannel compressive sensing.
• To improve the power-area product for neural signal acquisition.

Main Methods:

• Proposed a novel multichannel compressive sensing scheme leveraging spatial sparsity of electrode array signals.
• Implemented the circuit architecture in UMC 0.18 μm CMOS technology.
• Conducted extensive performance analysis and design optimization.

Main Results:

• Achieved preserved power efficiency with significantly reduced area overhead.
• Demonstrated recovery of fourfold compressed intracranial EEG signals with a 21.8 dB SNR.
• Resulted in a low-noise, compact, and power-efficient implementation consuming 10.5 μW per channel.

Conclusions:

• The proposed method offers a viable solution for area- and power-efficient compressive recording of neural signals.
• The improved power-area product is crucial for implantable biomedical systems.
• The technique enables high-fidelity signal reconstruction with reduced hardware demands.