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Investigation of Laplace barriers for arrayed electrowetting lab-on-a-chip.

A Schultz1, I Papautsky, J Heikenfeld

  • 1Department of Electrical Engineering and Computing Systems, University of Cincinnati , Cincinnati, Ohio 45221, United States.

Langmuir : the ACS Journal of Surfaces and Colloids
|April 18, 2014
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Summary

Partial-post Laplace barriers enable precise fluid control in electrowetting lab-on-a-chip devices. This study optimizes these barriers for geometry preservation and programmable fluid handling, reducing splitting errors to 5%.

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Area of Science:

  • Microfluidics
  • Electrowetting
  • Surface Science

Background:

  • Electrowetting enables fluid manipulation on surfaces using electric fields.
  • Laplace barriers offer potential for precise fluid geometry control and preservation.
  • Lab-on-a-chip devices require advanced methods for programmable fluid transport and storage.

Purpose of the Study:

  • To investigate the application of Laplace barriers in an electrowetting lab-on-a-chip (EW-LOC) system.
  • To evaluate the geometrical control and fluid transport capabilities of Laplace barriers.
  • To identify operational requirements and challenges for Laplace barriers in EW-LOC devices.

Main Methods:

  • Implementation of arrayed electrodes for electrowetting control.
  • Design and optimization of Laplace barriers for specific electrode dimensions and channel heights.
  • Integration of splitting and merging functions for fluid transport.
  • Electrical control strategies to minimize fluid splitting errors.

Main Results:

  • Laplace barriers demonstrated geometrical control of fluid shapes down to ~70 μm radii of curvature.
  • Optimized barriers were developed for 500 × 500 μm(2) electrodes and 78 μm channel height.
  • Fluid splitting volume errors were reduced to an average of 5% with proper electrical control.
  • Programmable fluid storage and continuous flow were achieved.

Conclusions:

  • Laplace barriers show significant potential for enhancing fluid management in lab-on-a-chip applications.
  • This study highlights the specific challenges and operational needs for implementing Laplace barriers in EW-LOC.
  • Further optimization of electrical control is crucial for maximizing the benefits of Laplace barriers.