Related Experiment Video
Updated: Apr 30, 2026
10:36
Culturing and Electrophysiology of Cells on NRCC Patch-clamp Chips
Published on: February 7, 2012
16.1K
Priming and testing silicon patch-clamp neurochips
Christophe Py1, Michael W Denhoff1, Nicaulas Sabourin1
1National Research Council of Canada, 1200 Montreal Road, Ottawa, Ontario K1A 0R6, Canada.
New Biotechnology
|May 1, 2014
Summary
Automated priming and testing of silicon patch-clamp chips achieves nearly 90% success. This rapid, automated process is suitable for large-scale electrophysiology experiments.
Area of Science:
- Biophysics
- Materials Science
- Electrical Engineering
Background:
- Silicon planar patch-clamp chips are crucial for electrophysiology.
- Manual assembly and testing present challenges for large-scale production.
Purpose of the Study:
- To develop and evaluate a systematic, automated method for priming and testing silicon planar patch-clamp chips.
- To assess the efficiency and reliability of the automated setup for high-throughput applications.
Main Methods:
- Assembly of silicon chips in Plexiglas packages.
- Sterilization using an air plasma reactor.
- Automated priming and electrical testing of the chips.
Main Results:
- Nearly 90% of chips were successfully primed with the automated setup.
- Shunt capacitance values ranged from 10 pF to 30 pF.
- Chip failures were primarily attributed to glue invasion, with assembly variability impacting capacitance.
Conclusions:
- The automated priming and testing system is highly efficient, with a success rate approaching 90%.
- The process takes less than 5 minutes per chip, making it compatible with mass production for electrophysiology.
- Addressing glue invasion and assembly variability is key to further optimizing chip performance.
