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A robust and scalable neuromorphic communication system by combining synaptic time multiplexing and MIMO-OFDM
Summary
This study introduces a new neuromorphic communication architecture using synaptic time multiplexing (STM) and multiple-input multiple-output orthogonal frequency-division multiplexing (MIMO-OFDM) for efficient, scalable hardware. The combined approach ensures robust, real-time data transfer in large-scale spiking neural networks.
Area of Science:
- Neuromorphic Engineering
- Communication Systems
- Computer Architecture
Background:
- Current neuromorphic systems face challenges in robust and efficient communication, particularly for large-scale implementations.
- Existing architectures often lack flexibility in connectivity and scalability, hindering widespread adoption.
- Need for communication methods that are both power-efficient and capable of high-speed data transfer.
Purpose of the Study:
- To propose and analyze a novel neuromorphic communication architecture.
- To enhance communication robustness, efficiency, and scalability in spiking neural networks.
- To provide a power and area-efficient solution for hardware implementation of very large-scale neuromorphic systems.
Main Methods:
- Integration of synaptic time multiplexing (STM) for intragroup communication, offering firing rate independence and flexible connectivity.
- Application of wired multiple-input multiple-output orthogonal frequency-division multiplexing (MIMO-OFDM) for efficient intergroup communication.
- Simulation of the proposed architecture using large-scale spiking neural network models.
Main Results:
- The proposed neuromorphic system with MIMO-OFDM demonstrates robust and efficient communication.
- The system achieves real-time operation with a high bit rate.
- Combined STM and MIMO-OFDM techniques result in flexible, scalable connectivity.
Conclusions:
- The novel architecture effectively addresses communication limitations in neuromorphic systems.
- The integration of STM and MIMO-OFDM provides a significant advancement for large-scale hardware implementations.
- This solution offers a power and area-efficient pathway for future neuromorphic computing.
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