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Electrical impedance imaging system using FPGAs for flexibility and interoperability.

Harsh Sohal, Hun Wi, Alistair Lee McEwan

  • 1Department of Biomedical Engineering and Impedance Imaging Research Center, Kyung Hee University, 446-701 Yongin, Korea. tioh@khu.ac.kr.

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Summary
This summary is machine-generated.

This study details the FPGA design for the KHU Mark2.5 Electrical Impedance Tomography (EIT) system, enabling multiple clinical functions and paving the way for future ASIC development.

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Area of Science:

  • Electrical Engineering
  • Biomedical Engineering
  • Medical Imaging

Background:

  • Modern Electrical Impedance Tomography (EIT) systems require integrated functionalities for enhanced clinical applicability.
  • Field-Programmable Gate Arrays (FPGAs) offer a flexible platform for developing complex EIT systems before committing to Application-Specific Integrated Circuits (ASICs).

Purpose of the Study:

  • To describe the FPGA design of the KHU Mark2.5 EIT system.
  • To classify and implement essential EIT functions within FPGA architecture.
  • To provide a foundation for future digital ASIC designs in EIT.

Main Methods:

  • Classified EIT functions into current injection/voltage measurement and data management/control.
  • Implemented these functions using two types of FPGAs: impedance measurement module (IMM) FPGA and intra-network controller FPGA.
  • Conducted functional and timing simulations for key FPGA operations.

Main Results:

  • Successfully implemented multiple EIT functions on FPGAs in the KHU Mark2.5 system.
  • Demonstrated the system's capability through phantom and animal imaging experiments.
  • Showcased advanced imaging techniques like fast multi-frequency and ECG-gated imaging.

Conclusions:

  • Optimizing digital design in parallel EIT systems is crucial for minimizing artifacts and maximizing performance.
  • The KHU Mark2.5 EIT system's FPGA design supports numerous clinical functions.
  • The described FPGA architecture serves as a basis for developing future EIT digital ASICs with improved performance and human interface.