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Area of Science:

  • Materials Science
  • Nanotechnology
  • Electrical Engineering

Background:

  • Graphene-based memory devices offer potential for flexible electronics.
  • Controlling charge trapping mechanisms is crucial for enhancing memory performance.

Purpose of the Study:

  • To develop a transparent flexible graphene nano-floating gate transistor memory (NFGTM) device.
  • To investigate the impact of gold nanoparticle (AuNP) size, dielectric thickness, and graphene doping on memory performance.
  • To maximize the memory window through controlled graphene doping.

Main Methods:

  • Fabrication of NFGTMs using a single-layer graphene channel and AuNP charge traps.
  • Systematic variation of AuNP sizes, tunneling dielectric thickness, and graphene doping levels.
  • Characterization of device performance, including memory window, switching speed, reliability, and stability.

Main Results:

  • Demonstrated a large memory window of 12 V.
  • Achieved fast switching speeds of 1 μs.
  • Exhibited robust electrical reliability (10^5 s), mechanical stability (500 cycles), and thermal stability (100 °C).
  • Showcased superior performance compared to existing graphene memory devices.

Conclusions:

  • Graphene NFGTMs with AuNP charge traps represent a promising technology for flexible memory applications.
  • Graphene doping is a key parameter for optimizing the memory window and overall device performance.
  • The developed devices exhibit excellent characteristics for practical implementation.