A dual slope charge sampling analog front-end for a wireless neural recording system

Area of Science:

• Biomedical Engineering
• Integrated Circuit Design
• Signal Processing

Background:

• Neural signal acquisition requires efficient analog front-end (AFE) architectures.
• Existing AFEs often face challenges with power consumption and simultaneous signal conditioning.
• Charge sampling offers a promising approach for low-power analog signal processing.

Purpose of the Study:

• To present a novel dual slope charge sampling (DSCS) AFE architecture for neural signal amplification and conditioning.
• To demonstrate simultaneous amplification, filtering, and sampling with minimal power consumption.
• To integrate the AFE with a pseudo-digital transmitter for wireless data transmission.

Main Methods:

• Designed and fabricated an 8-channel DSCS-AFE in a 0.35-μm CMOS process.
• Utilized charge sampling for analog signal conditioning (amplification and filtering).
• Employed a circular shift register (CSR) for time division multiplexing (TDM) of pulse width modulated (PWM) signals.

Main Results:

• The 8-channel system-on-a-chip (SoC) occupies 2.4 × 2.1 mm² and consumes 255 μW from a 1.8V supply.
• Achieved a measured input-referred noise of 6.50 μV(rms) in the 288 Hz~10 kHz range.
• Each channel operates at a sampling rate of 31.25 kHz with a power consumption of 31.8 μW.

Conclusions:

• The DSCS-AFE architecture effectively enables low-power, simultaneous neural signal amplification, filtering, and sampling.
• The integrated TDM-PWM output facilitates wireless transmission, suitable for compact neural recording systems.
• This novel AFE design presents a significant advancement in power-efficient neural signal acquisition technology.