Test generation algorithm for fault detection of analog circuits based on extreme learning machine.

Area of Science:

• Electrical Engineering
• Computer Science
• Artificial Intelligence

Background:

• Analog device testing presents challenges in cost-effectiveness and precision.
• Existing test generation methods may suffer from reduced accuracy with fewer data points.

Purpose of the Study:

• To propose a novel, cost-effective, and low-risk test generation algorithm for analog devices under test (DUT).
• To enhance fault classification and detection capabilities in analog circuit testing.

Main Methods:

• Developed a test generation algorithm leveraging extreme learning machine (ELM) for response space classification.
• Utilized ELM to avoid reduced test precision when decreasing the number of impulse-response samples.
• Introduced a simplified test signal generator and test structure within the algorithm.

Main Results:

• The ELM-based algorithm demonstrated efficient time savings through response space classification.
• Maintained high test precision despite a reduction in impulse-response samples.
• Experimental validation confirmed the improvements and functionality of the proposed method.

Conclusions:

• The novel ELM-based test generation algorithm offers significant advantages in efficiency and precision for analog DUT testing.
• The simplified test signal generator and structure contribute to the algorithm's practicality.
• This approach provides a cost-effective and low-risk solution for analog device fault detection.