Top-down fabrication of 4H-SiC nano-channel field effect transistors

4H-SiC nano-channel field effect transistors (FETs) with various widths of 3 μm-50 nm have been fabricated by "top-down" approach using electron-beam lithography process. It has been demonstrated that the gate controllability of the SiC FETs is improved with decreasing channel width. In the fabricated devices the threshold voltage V(th) for the 50 nm-width nano-channel FETs shows a positive shift (ΔV(th) = 1.4 V) with respect to that of the reference FETs. The on-current degradation of the SiC nano-channel FETs is found to be 1.5 times lower than that of the reference FETs at elevated temperatures up to 450 K. This attributed to the improved heat dissipation of the nano-channel structure with a large surface to volume ratio.