Region-referenced phase unwrapping architecture for digital holographic microscopy

Area of Science:

• Optics and Photonics
• Microscopy Technology
• Computer Engineering

Background:

• Digital holographic microscopy (DHM) requires efficient phase unwrapping for accurate 3D reconstruction.
• Existing phase unwrapping methods can be computationally intensive and resource-demanding.
• Hardware acceleration is crucial for real-time DHM applications.

Purpose of the Study:

• To introduce a novel hardware phase-unwrapping architecture for DHM.
• To optimize the architecture for reduced resource consumption and enhanced computational speed.
• To validate the performance of the proposed architecture through experimental implementation.

Main Methods:

• Development of a hardware architecture based on an iterative region-referenced algorithm.
• Integration of a novel data reuse scheme to minimize memory bandwidth.
• Implementation of the architecture on a field-programmable gate array (FPGA).
• Deployment as a hardware accelerator within a network-on-chip (NoC) based embedded system.

Main Results:

• The architecture demonstrates efficient phase unwrapping with reduced hardware resource utilization.
• The data reuse scheme significantly lowers memory bandwidth requirements.
• Fast computation speeds were achieved for iterative unwrapping operations.
• Experimental validation confirmed the superior performance of the proposed hardware accelerator.

Conclusions:

• The novel hardware architecture offers an effective solution for phase unwrapping in DHM.
• The design enables high-speed, resource-efficient processing for embedded DHM systems.
• This work advances the practical implementation of DHM for demanding applications.