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Optimising apodized grating couplers in a pure SOI platform to -0.5 dB coupling efficiency
Optics Express
|July 21, 2015
Summary
We optimized silicon-on-insulator grating couplers without bottom reflectors, achieving a record 89% coupling efficiency. These designs are compatible with deep-UV lithography and existing silicon photonics manufacturing processes.
Area of Science:
- Photonics
- Materials Science
- Optical Engineering
Background:
- Silicon-on-insulator (SOI) technology is crucial for integrated photonics.
- Grating couplers are essential for coupling light into and out of SOI chips.
- Optimizing grating couplers for higher efficiency and manufacturability is an ongoing challenge.
Purpose of the Study:
- To theoretically optimize 1D apodized grating couplers in a pure SOI architecture (without bottom reflectors).
- To investigate the impact of silicon layer thickness on coupling efficiency.
- To assess the feasibility of these designs under deep-UV lithography constraints.
Main Methods:
- Theoretical optimization using a general mutative method.
- Comprehensive 2D Finite Difference Time Domain (FDTD) simulations.
- Analysis of grating couplers in 220 nm and 340 nm SOI platforms.
- Inclusion of 193 nm UV-lithographic fabrication constraints.
Main Results:
- A maximum coupling efficiency of 65% (-1.9 dB) was found for 220 nm SOI.
- A record coupling efficiency of 89% (-0.5 dB) was achieved with a 340 nm SOI design.
- Further increases in silicon layer thickness did not improve efficiency, suggesting -0.5 dB as a potential maximum.
- The 340 nm design maintained -0.7 dB efficiency even with fabrication constraints.
Conclusions:
- The study presents the first pure SOI grating couplers compatible with deep-UV lithography exceeding -1 dB insertion loss.
- The optimized 340 nm SOI design offers record-breaking efficiency and manufacturability.
- These designs are readily compatible with existing silicon photonics foundry processes.
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