You might also read
Articles linked to this work by shared authors, journal, and citation graph.
Updated: Mar 29, 2026

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
Published on: July 24, 2015
N I Verbitskiy1,2,3, A V Fedorov2,4,5, G Profeta6,7
1Faculty of Physics, University of Vienna, Strudlhofgasse 4, A-1090 Vienna, Austria.
Researchers developed a new method to integrate graphene and hexagonal boron nitride (hBN) into semiconductor technology. This technique creates high-quality interfaces, enabling advanced nanoelectronic applications by preserving the intrinsic electronic properties of 2D materials.
06:57Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon
Published on: July 17, 2020
04:57Residue-Free Fabrication of van der Waals Heterostructures of Two-Dimensional Materials
Published on: July 18, 2025
Area of Science:
Background:
Purpose of the Study:
Main Methods:
Main Results:
Conclusions: