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Updated: Mar 24, 2026

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
Published on: July 24, 2015
Gate-Tunable Tunneling Resistance in Graphene/Topological Insulator Vertical Junctions
Liang Zhang1, Yuan Yan1, Han-Chun Wu2
1State Key Laboratory for Mesoscopic Physics, School of Physics, Peking University , Beijing 100871, P.R. China.
Abstract:
Graphene-based vertical heterostructures, particularly stacks incorporated with other layered materials, are promising for nanoelectronics. The stacking of two model Dirac materials, graphene and topological insulator, can considerably enlarge the family of van der Waals heterostructures. Despite good understanding of the two individual materials, the electron transport properties of a combined vertical heterojunction are still unknown. Here, we show the experimental realization of a vertical heterojunction between Bi2Se3 nanoplate and monolayer graphene. At low temperatures, the electron transport through the vertical heterojunction is dominated by the tunneling process, which can be effectively tuned by gate voltage to alter the density of states near the Fermi surface. In the presence of a magnetic field, quantum oscillations are observed due to the quantized Landau levels in both graphene and the two-dimensional surface states of Bi2Se3. Furthermore, we observe an exotic gate-tunable tunneling resistance under high magnetic field, which displays resistance maxima when the underlying graphene becomes a quantum Hall insulator.
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