Compact SPAD-Based Pixel Architectures for Time-Resolved Image Sensors.

Area of Science:

• Photonics and Imaging Technologies
• Semiconductor Device Physics

Background:

• Single-photon avalanche diode (SPAD) image sensors are critical for time-resolved imaging.
• Advancements are needed in pixel architecture for high spatial resolution and uniformity in large arrays.

Purpose of the Study:

• To review the state-of-the-art in SPAD image sensors for time-resolved imaging.
• To focus on pixel architectures enabling high spatial resolution and uniformity.
• To discuss analog techniques for compact, low-power SPAD pixels.

Main Methods:

• Review of current CMOS SPAD implementations and their characteristics.
• Critical discussion of analog techniques for time-gated photon counting and timestamping.
• Analysis of integration challenges for large pixel arrays.

Main Results:

• Emphasis on small pixel size (<25 μm) and high fill factor (>20%) for high spatial resolution.
• Discussion of analog counting and time-to-analog conversion in NMOS-only pixels.
• Achieved quantum-limited single-photon counting, time gating down to 0.75 ns, and 368 ps jitter timestamping.

Conclusions:

• Small pixel size and high fill factor are key for high-resolution SPAD imaging.
• Analog techniques offer compact and low-power solutions for SPAD pixels.
• The discussed methods achieve excellent performance in photon counting and timestamping.