Self-Boosted Tunnel Field-Effect Transistor Using Nitride Charge Trapping Layer for Low Supply Voltage Operation

Area of Science:

• Semiconductor device physics
• Nanoelectronics
• Solid-state electronics

Background:

• Tunneling Field-Effect Transistors (TFETs) offer excellent subthreshold characteristics for low-power electronics.
• However, TFET-based circuits suffer from large propagation delays due to low current drivability and high gate-to-drain capacitance.

Purpose of the Study:

• To investigate the electrical characteristics of self-boosted TFETs incorporating a nitride charge trapping layer.
• To evaluate the performance enhancement of these TFETs for low supply voltage applications.

Main Methods:

• Technology Computer-Aided Design (TCAD) simulations were employed to analyze device electrical properties.
• Mixed-mode circuit simulations were conducted to compare conventional and self-boosted TFET inverters.

Main Results:

• The nitride charge trapping layer significantly improves subthreshold characteristics and on-current (I(ON)) for both nTFET and pTFET.
• Self-boosted TFET inverters demonstrate reduced propagation delay, particularly at ultra-low supply voltages, compared to conventional TFETs.

Conclusions:

• Self-boosted TFETs with nitride charge trapping layers present a viable solution for enhancing the speed of low-power digital circuits.
• These devices are particularly beneficial for ultra-low voltage operation, mitigating the dramatic increase in system delay observed in conventional designs.