Code generator for implementing dual tree complex wavelet transform on reconfigurable architectures for mobile...

Area of Science:

• Digital Signal Processing
• Embedded Systems Engineering
• Computer Engineering

Background:

• The dual-tree complex wavelet transform (DTCWT) is crucial for multi-channel real-time applications requiring near shift-invariance.
• Implementing DTCWT on traditional platforms like PCs or PIC microcontrollers presents challenges in portability and achieving desired speed performance.
• Field-programmable gate arrays (FPGAs) offer a promising solution due to their portability, low cost, low power, and high-performance computing capabilities.

Purpose of the Study:

• To develop an application for generating diverse architectures for DTCWT implementation.
• To create a low-cost and portable solution for real-time multi-channel applications.
• To overcome the limitations of existing DTCWT implementation methods.

Main Methods:

• Comparative analysis of DTCWT implementation in C on a PC and a PIC microcontroller.
• Exploration of FPGA-based implementation for enhanced performance and portability.
• Utilisation of Xilinx System Generator DSP for initial algorithm design.
• Implementation using Verilog Hardware Description Language.
• Development of a novel code generator program to automate architecture production.

Main Results:

• PC and PIC microcontroller implementations showed limitations in portability and speed, respectively.
• FPGA implementation was identified as the most feasible solution for high-performance, portable, low-cost, and low-power DTCWT.
• Initial designs using DSP tools were not optimized for area and power.
• Verilog implementation presented its own set of challenges.
• The proposed code generator simplifies algorithm usage and adaptation, producing various architectures.

Conclusions:

• The developed code generator program effectively addresses the complexities of DTCWT implementation.
• It offers a simplified and adaptable solution for creating diverse DTCWT architectures.
• This approach enhances the feasibility of deploying DTCWT in resource-constrained, real-time embedded systems.