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A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node.

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  • 1Department of Electrical Engineering, Fu Jen Catholic University, Taipei 24205, Taiwan. duosheng@mail.fju.edu.tw.

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Summary

This study introduces an all-digital, low-power oscillator for wireless body area networks (WBANs). The novel design offers reduced power consumption and high resolution, enhancing integration for WBAN applications.

Keywords:
all digitallow poweron-chip reference clock generatorwireless body area network (WBAN)wireless sensor node

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Area of Science:

  • Electrical Engineering
  • Integrated Circuit Design

Background:

  • Wireless Body Area Networks (WBANs) require efficient reference clocks.
  • Existing oscillators often face challenges with power consumption and resolution.

Purpose of the Study:

  • To present an all-digital, low-power oscillator tailored for WBAN applications.
  • To achieve high delay resolution and a wide frequency range with reduced complexity.

Main Methods:

  • Utilized a cascade-stage structure for enhanced resolution and frequency range.
  • Incorporated a hysteresis delay cell to minimize power and cost.
  • Implemented the design using a standard 0.18 μm CMOS process.

Main Results:

  • Achieved operational frequencies from 7 to 155 MHz.
  • Demonstrated significantly reduced power consumption (79.6 μW @ 7 MHz) and hardware costs (92.4% and 70.4% reduction).
  • Attained a high delay resolution of 4.6 ps.

Conclusions:

  • The proposed all-digital oscillator meets WBAN requirements for low power and high resolution.
  • The design's simplicity and efficiency facilitate system-level integration.
  • Offers a superior alternative to conventional oscillator designs for WBANs.