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A Complementary Metal Oxide Semiconductor Process-Compatible Ferroelectric Tunnel Junction.

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  • 1Centre Énergie, Matériaux et Télécommunications, INRS , Varennes, Québec J3X1S2, Canada.

ACS Applied Materials & Interfaces
|April 4, 2017
PubMed
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This summary is machine-generated.

Researchers developed a ferroelectric tunnel junction (FTJ) using CMOS-compatible materials, overcoming integration challenges in silicon memory technology. This breakthrough demonstrates a promising Hf0.5Zr0.5O2 material for next-generation electronic devices.

Area of Science:

  • Materials Science
  • Solid State Physics
  • Nanotechnology

Background:

  • Ferroelectric tunnel junctions (FTJs) show promise for memory applications.
  • Integrating perovskite-based FTJs into silicon technology is hindered by CMOS incompatibility.
  • Developing CMOS-compatible ferroelectric materials is crucial for advanced memory devices.

Purpose of the Study:

  • To fabricate and characterize a novel FTJ using CMOS-compatible materials.
  • To investigate the ferroelectric properties and tunneling electroresistance (TER) effect.
  • To assess the potential of Hf0.5Zr0.5O2 for silicon memory integration.

Main Methods:

  • Fabrication of an FTJ with a Hf0.5Zr0.5O2 tunnel barrier and TiN electrode.
Keywords:
CMOS processelectronic band alignmentferroelectric tunnel junctionsnanoscale characterizationtunneling electroresistance effect

Related Experiment Videos

  • Grazing angle incidence X-ray diffraction for structural analysis.
  • Electrostatic potential profile reconstruction and direct tunneling current modeling.
  • Main Results:

    • Successful fabrication of a ferroelectric Hf0.5Zr0.5O2 based FTJ.
    • Confirmation of the noncentrosymmetric orthorhombic ferroelectric phase.
    • Demonstration of the tunneling electroresistance (TER) effect with a ratio of ~15 at +0.2 V.

    Conclusions:

    • Hf0.5Zr0.5O2 is a CMOS-compatible material suitable for FTJ fabrication.
    • The study confirms the TER effect in the developed FTJ device.
    • This material presents a viable option for integration into conventional silicon memory technology.