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Performance prediction for silicon photonics integrated circuits with layout-dependent correlated manufacturing

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    This study introduces an enhanced Monte Carlo (MC) simulation to predict how manufacturing variations affect photonics integrated circuits (PICs). The method accurately models layout-dependent variations, improving performance predictions for these complex optical devices.

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    Area of Science:

    • Photonics
    • Integrated Circuit Design
    • Manufacturing Process Control

    Background:

    • Manufacturing variations significantly impact the performance of photonics integrated circuits (PICs).
    • Accurate prediction of these variations is crucial for reliable circuit design and fabrication.
    • Existing simulation methods often struggle to capture layout-dependent correlated variations.

    Purpose of the Study:

    • To develop an enhanced Monte Carlo (MC) simulation methodology for predicting the impact of layout-dependent correlated manufacturing variations on PIC performance.
    • To establish a sub-nanometer accurate method for characterizing photonics manufacturing variations.
    • To enable circuit simulations that account for correlated variations between components.

    Main Methods:

    • Characterization of waveguide width and height variations using spectral response of racetrack resonators.
    • Development of models for layout-dependent enhanced MC simulation using netlist extraction.
    • Simulation of spatially correlated physical variations across PICs on a discrete grid and mapping to circuit components.

    Main Results:

    • Demonstrated a sub-nanometer accurate method to characterize photonics manufacturing variations.
    • Developed and detailed the simulation flow and theoretical models for layout-dependent enhanced MC simulation.
    • Successfully predicted common-mode and differential-mode variations in ring-resonator filter circuits using the enhanced MC simulation.

    Conclusions:

    • The enhanced MC simulation methodology effectively predicts the performance impacts of layout-dependent correlated manufacturing variations in PICs.
    • The developed characterization method provides high accuracy for extracting waveguide dimensions.
    • This approach offers a powerful tool for improving the design and reliability of integrated photonics circuits.