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P-N junction01:11

P-N junction

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A p-n junction is formed when p-type and n-type semiconductor materials are joined together. At the interface of the p-n junction, holes from the p-side and electrons from the n-side begin to diffuse into the opposite sides due to the concentration gradient. This diffusion of carriers leads to a region around the junction where there are no free charge carriers, known as the depletion region. The charge density within the depletion region for the n-side and p-side can be described by the...
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There is variation in the electrical conductivity of materials - metals, semiconductors, and insulators that are showcased with the help of the energy band diagrams.
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The operation of a p-n junction diode involves various biasing conditions, including forward bias, reverse bias, and equilibrium.
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The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
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Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
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Two-dimensional non-volatile programmable p-n junctions.

Dong Li1, Mingyuan Chen1, Zhengzong Sun2

  • 1Shanghai Key Laboratory of Special Artificial Microstructure Materials and Technology, School of Physics Science and Engineering, Tongji University, Shanghai 200092, China.

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Stable, programmable two-dimensional (2D) p-n junctions were created using stacked 2D materials. These junctions show good rectifying and photovoltaic properties, enabling applications in memory and logic circuits.

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Area of Science:

  • Materials Science
  • Condensed Matter Physics
  • Nanotechnology

Background:

  • Semiconductor p-n junctions are fundamental to electronics and optoelectronics.
  • Miniaturization drives interest in two-dimensional (2D) materials for devices.
  • Traditional nanoscale fabrication methods for p-n junctions are limited.

Purpose of the Study:

  • To develop stable, non-volatile, and programmable p-n junctions using all-2D materials.
  • To overcome the performance degradation of nanoscale p-n junctions.

Main Methods:

  • Fabrication of vertically stacked WSe2/hexagonal boron nitride/graphene layers.
  • Utilizing a semifloating gate field-effect transistor configuration.
  • Programming and controlling junction properties via gate voltages.

Main Results:

  • Achieved stable non-volatile programmable p-n junctions with good rectifying behavior (ratio of 10^4).
  • Demonstrated photovoltaic properties with power conversion efficiency up to 4.1% under low light.
  • Successfully utilized the programmable 2D p-n junctions in memory, photovoltaic, and logic applications.

Conclusions:

  • Vertically stacked all-2D material p-n junctions offer a promising platform for next-generation electronic and optoelectronic devices.
  • The non-volatile programmable nature enables versatile functionalities for advanced circuits.
  • This work advances the integration of 2D materials into functional nanoscale electronic systems.