A High-On/Off-Ratio Floating-Gate Memristor Array on a Flexible Substrate via CVD-Grown Large-Area 2D Layer Stacking

Area of Science:

• Materials Science
• Nanotechnology
• Electronics Engineering

Background:

• Memristors are crucial for emulating synaptic activities in neuromorphic systems.
• Existing phase-change and resistive memory memristors face significant reliability challenges, hindering commercialization.
• Floating-gate memory offers a potential alternative for reliable synaptic emulation.

Purpose of the Study:

• To demonstrate a highly reliable memristor array using floating-gate memory.
• To utilize van der Waals layered materials for improved memristor performance.
• To address the commercialization barriers posed by low reliability in current memristor technologies.

Main Methods:

• Fabrication of a memristor array using centimeter-scale MoS2 (molybdenum disulfide) channel and graphene trap layers grown by chemical vapor deposition (CVD).
• Utilized Al2O3 (aluminum oxide) as the tunneling barrier in a two-terminal (source-drain) floating-gate memory configuration.
• Tested memory characteristics including on/off ratio, endurance, and threshold voltage stability.

Main Results:

• Achieved a high on/off ratio (>10^3 in 93% of devices, average 10^4).
• Demonstrated stable 6-level memory applications due to high on/off ratio and endurance.
• Exhibited excellent durability over 8000 cycles with negligible shifts in threshold voltage and on-current.
• Showcased strain tolerance up to 1% on flexible substrates.

Conclusions:

• The demonstrated floating-gate memristor array offers a practical and reliable solution for neuromorphic systems.
• CVD-grown van der Waals layered materials provide a viable pathway for next-generation electronic devices.
• This work significantly improves upon the reliability and durability of existing memristor technologies.