Multiple Physical Time Scales and Dead Time Rule in Few-Nanometers Sized Graphene-SiO_x-Graphene Memristors

The resistive switching behavior in SiO_x-based phase change memory devices confined by few nanometer wide graphene nanogaps is investigated. Our experiments and analysis reveal that the switching dynamics is not only determined by the commonly observed bias voltage dependent set and reset times. We demonstrate that an internal time scale, the dead time, plays a fundamental role in the system's response to various driving signals. We associate the switching behavior with the formation of microscopically distinct SiO_x amorphous and crystalline phases between the graphene electrodes. The reset transition is attributed to an amorphization process due to a voltage driven self-heating; it can be triggered at any time by appropriate voltage levels. In contrast, the formation of the crystalline ON state is conditional and only occurs after the completion of a thermally assisted structural rearrangement of the as-quenched OFF state which takes place within the dead time after a reset operation. Our results demonstrate the technological relevance of the dead time rule which enables a zero bias access of both the low and high resistance states of a phase change memory device by unipolar voltage pulses.