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Electric-field Control of Electronic States in WS2 Nanodevices by Electrolyte Gating
Published on: April 12, 2018
Role of Electrical Double Layer Structure in Ionic Liquid Gated Devices.
Jennifer M Black, Jeremy Come, Sheng Bi1
1State Key Laboratory of Coal Combustion, School of Energy and Power Engineering, Huazhong University of Science and Technology (HUST) , Wuhan 430074, China.
Ionic liquid structure at oxide surfaces dictates transistor performance. Ion orientation changes with applied voltage, creating distinct conductivity states in amorphous indium gallium zinc oxide transistors.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Surface Science
Background:
- Ionic liquid gating is a powerful technique for tuning the electronic properties of transition metal oxides.
- Understanding the interfacial structure of ionic liquids is crucial for optimizing device performance.
Purpose of the Study:
- To investigate the correlation between ionic liquid structure and electronic properties at a semiconducting oxide interface.
- To elucidate the mechanism of field-effect gating in liquid-gated transistors.
Main Methods:
- Combined experimental and theoretical investigation of ionic liquid structure at an amorphous indium gallium zinc oxide (IGZO) surface.
- Operando thin-film transistor (TFT) measurements under applied electric potential.
Main Results:
- The transition between ON and OFF states in IGZO TFTs is linked to ionic liquid densification and counterion reorientation at the oxide surface.
- Three distinct steps in ion arrangement correlate with different electrical conductivity regimes.
- Surface charge density variations due to ion arrangement explain the observed conductivity changes.
Conclusions:
- The field-effect gating process is directly influenced by the interfacial ionic liquid structure.
- This study provides unprecedented insight into liquid-gated transistor operation by linking nanoscopic structure to macroscopic properties.
- Findings enable the design of novel ionic liquids and advanced device architectures.
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