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Embedded tin nanocrystals in silicon-an electrical characterization.

L Scheffler1, M J Haastrup2, S Roesgaard2

  • 1Department of Physics and Astronomy, Aarhus University, Ny Munkegade 120, DK-8000 Aarhus C, Denmark.

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|December 9, 2017
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This summary is machine-generated.

Tin nanocrystals in silicon were studied using deep level transient spectroscopy. Two tin-related deep traps (Sn1 and Sn2) were identified, dependent on annealing temperature, indicating defect transformation during nanocrystal formation.

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Area of Science:

  • Materials Science
  • Semiconductor Physics
  • Nanotechnology

Background:

  • Tin nanocrystals embedded in silicon-germanium (SiSn) layers are of interest for semiconductor applications.
  • Understanding defect behavior in these nanostructures is crucial for device performance.

Purpose of the Study:

  • To investigate tin-related deep traps in SiSn layers with embedded tin nanocrystals.
  • To correlate the presence of these traps with annealing temperature and nanocrystal formation.

Main Methods:

  • Deep Level Transient Spectroscopy (DLTS) was employed to identify and characterize electrical traps.
  • Scanning Transmission Electron Microscopy (STEM) was used to confirm the formation of tin nanocrystals.

Main Results:

  • Two distinct tin-related deep traps, labeled Sn1 and Sn2, were observed.
  • Sn1 was present at lower annealing temperatures (up to 700°C), while Sn2 appeared at higher temperatures (above 700°C).
  • Tin nanocrystal formation, confirmed by STEM at 700°C, coincided with the emergence of the Sn2 trap.

Conclusions:

  • The Sn1 trap is likely a tin-related precursor defect.
  • Upon annealing above 700°C, this precursor defect transforms into either tin nanocrystals or an interface defect associated with the nanocrystal surface, leading to the Sn2 trap.