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Mobility Engineering in Vertical Field Effect Transistors Based on Van der Waals Heterostructures.

Yong Seon Shin1, Kiyoung Lee2, Young Rae Kim1

  • 1Department of Electronic and Electrical Engineering, Sungkyunkwan University, Suwon-si, 16419, Republic of Korea.

Advanced Materials (Deerfield Beach, Fla.)
|January 16, 2018
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Summary

Researchers investigated vertical carrier mobility in 2D van der Waals heterostructures (vdWHs) for vertical field-effect transistors (VFETs). They found that reducing trap states in WSe2 significantly enhances mobility, enabling improved VFET performance for integrated circuits.

Keywords:
2D materialsmobilityvan der Waals heterostructuresvertical carrier transport mechanismvertical field-effect transistors

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Area of Science:

  • Materials Science
  • Condensed Matter Physics
  • Nanotechnology

Background:

  • Vertical integration of 2D layered materials into van der Waals heterostructures (vdWHs) is crucial for advanced electronic and optoelectronic devices.
  • Vertical carrier transport and mobility in vertical field-effect transistors (VFETs) based on vdWHs are critical for integrated circuit applications but remain under-investigated.

Purpose of the Study:

  • To investigate and engineer the vertical carrier mobility in VFETs based on vdWHs.
  • To understand the influence of scattering mechanisms, particularly trap states in WSe2, on vertical transport.
  • To identify strategies for improving vertical mobility in VFETs.

Main Methods:

  • Systematic investigation of mobility in vdWH VFETs under varying drain biases, gate biases, and metal work functions.
  • Analysis of transport mechanisms including Ohmic, trap-limited, and space-charge-limited transport.
  • Engineering of trap states in WSe2 by manipulating Fermi level and Schottky barriers.

Main Results:

  • Trap states in WSe2 were identified as the primary source of scattering affecting vertical mobility.
  • Three distinct transport regimes were observed: Ohmic, trap-limited, and space-charge-limited transport.
  • Vertical mobility was significantly improved by suppressing trap states, achieving a 76-fold increase in Mn vdWH at +50 V gate voltage compared to Au vdWH.

Conclusions:

  • Suppressing trap states in WSe2 by raising the Fermi level is an effective strategy to enhance vertical mobility in VFETs.
  • Modulating carrier injection and Schottky barriers through gate bias and metal work function engineering are key to improving VFET performance.
  • This research paves the way for enhanced VFETs for successful integration into advanced electronic circuits.