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Evaluating Plasmonic Transport in Current-carrying Silver Nanowires
Published on: December 11, 2013
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Surface State Dynamics Dictating Transport in InAs Nanowires
David Lynall1,2, Selvakumar V Nair1,2, David Gutstein1,3
1Centre for Advanced Nanotechnology, University of Toronto , 170 College Street, Toronto, Ontario M5S 3E3, Canada.
Nano Letters
|January 19, 2018
Summary
Surface traps significantly impact InAs nanowire transistors, causing hysteresis and mobility changes. Controlling these slow traps via gate voltage and cooling is crucial for stable nanoelectronic device performance.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Nanostructures are sensitive to surface effects like electron trapping.
- Nonequilibrium trapping dynamics are often ignored in nanoelectronic transport.
Purpose of the Study:
- Investigate the influence of dynamic trapping on InAs nanowire transport.
- Characterize the behavior of surface traps and their impact on device performance.
Main Methods:
- Studied hysteretic and time-dependent transconductance in InAs nanowires.
- Manipulated trap occupation using gate voltage and cryogenic cooling.
- Developed a time-dependent model for nanowire transconductance.
Main Results:
- Observed large densities of slow surface traps (∼10^13 cm^-2).
- Demonstrated control over trap occupation and charge via electrostatic manipulation and cooling.
- Reported a 400% change in field-effect mobility due to varying gate voltage and sweep rate.
- Model showed excellent agreement with experimental data, confirming slow trap dynamics.
Conclusions:
- Dynamic trapping processes profoundly affect InAs nanowire transistor characteristics.
- Electrostatic history and dynamics are critical for device behavior.
- Understanding slow surface trap dynamics is essential for designing reliable nanoelectronic devices.
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