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The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory.

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Area of Science:

  • Semiconductor Device Physics
  • 3D NAND Flash Memory Technology
  • Advanced Transistor Architectures

Background:

  • The bottom select transistor (BSG) is critical for 3D NAND Flash Memory operation.
  • Optimizing BSG performance is essential for enhancing memory density and reliability.
  • Existing BSG structures present challenges in threshold voltage (Vt) distribution and self-boosting potential control.

Purpose of the Study:

  • To investigate and optimize the performance of the Gate All Around (GAA) L-Shaped BSG in 3D NAND Flash Memory.
  • To propose process and structural modifications for improved BSG characteristics.
  • To enhance cell characteristics distribution and self-boosting potential control in high-density 3D NAND arrays.

Main Methods:

  • Investigated the GAA L-Shaped BSG structure, which integrates horizontal and vertical MOSFETs.
  • Employed process optimization, specifically increasing implant dose in the vertical channel.
  • Utilized structural modification, including BSG corner rounding.
  • Validated findings through experimental data and Technology Computer-Aided Design (TCAD) simulations.

Main Results:

  • Increasing implant dose in the vertical channel resulted in a tighter Vt distribution for the BSG.
  • BSG corner rounding was proposed and shown to improve BSG characteristics.
  • Experimental and TCAD simulation data demonstrated good agreement.
  • The proposed methods effectively improve cell characteristics distribution and self-boosting potential control.

Conclusions:

  • The GAA L-Shaped BSG structure offers a novel approach for 3D NAND Flash Memory.
  • Process and structural optimizations, such as implant dose control and corner rounding, significantly enhance BSG performance.
  • These optimizations are crucial for achieving improved reliability and scalability in next-generation high-density 3D NAND Flash Memory devices.