Real-Time Spaceborne Synthetic Aperture Radar Float-Point Imaging System Using Optimized Mapping Methodology and a...

Area of Science:

• Earth Observation Systems
• Signal Processing
• VLSI Design

Background:

• Satellite-based synthetic aperture radar (SAR) systems are crucial for rapid disaster response.
• On-board SAR imaging requires high real-time processing performance within strict size, weight, and power (SWaP) constraints.
• Existing systems often rely on distributed technologies, increasing complexity and power demands.

Purpose of the Study:

• To present a multi-node prototype system for real-time SAR imaging processing.
• To achieve high-performance SAR imaging within stringent SWaP limitations.
• To demonstrate the feasibility of integrating complex SAR algorithms onto a single FPGA.

Main Methods:

• Decomposition of the chirp scaling (CS) SAR imaging algorithm into distinct computational parts.
• Application of linearization and optimum logic-memory allocation for the nonlinear component.
• Utilization of the two-part bandwidth balance method for the linear component.
• Integration of float-point SAR imaging processing onto a single Field Programmable Gate Array (FPGA) chip.

Main Results:

• A single processing node achieves 5-m resolution SAR imaging in 10.6 seconds, consuming only 17 W.
• A prototype system with four processing nodes and one master node was successfully implemented using a Xilinx xc6vlx315t FPGA.
• The complete system weighs 10 kg, occupies 32 cm × 24 cm × 20 cm, and consumes under 100 W.
• Real-time performance was validated using Chinese Gaofen-3 stripmap continuous imaging data.

Conclusions:

• The proposed multi-FPGA parallel accelerating system effectively addresses real-time SAR imaging processing challenges.
• The design enables high-performance, low-power SAR imaging suitable for satellite applications.
• This approach offers a viable alternative to distributed processing, enhancing system integration and efficiency.