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An Analysis of Hole Trapping at Grain Boundary or Poly-Si Floating-Body MOSFET

Taejin Jang1, Myung-Hyun Baek1, Hyungjin Kim1

  • 1Inter-University Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, Republic of Korea.

Journal of Nanoscience and Nanotechnology
|April 22, 2018
PubMed

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