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Robust PI/PID controllers for load disturbance based on direct synthesis
R Vilanova1, O Arrieta2, P Ponsa3
1Departament de Telecomunicació i d'Enginyeria de Sistemes, Escola d'Enginyeria, Universitat Autònoma de Barcelona, 08193 Bellaterra, Barcelona, Spain.
Abstract:
It is recognized that disturbance rejection is much more important than set-point tracking for many process control applications, leading set-point tracking to a secondary level of interest. In this paper a proposal for robust tuning of PI/PID controllers designed under the direct synthesis for load disturbance (DS-d) approach is presented. As with the IMC-like approaches, the resulting DS-d tunings are expressed in terms of a unique parameter that determines the desired speed of response of the regulatory behavior. Even at first sight it may seem quite simple, there is no known guide on how to select such parameter in order to achieve some desired robustness. As it will be shown, for some process dynamics, this selection is not as simple as it may seem. Tuning expressions for the most common types of process models are provided such that the closed loop time constant is the fastest one that allows to reach the desired robustness. Simulation examples show the application of the suggested tuning.
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