A CMOS Front-End Interface ASIC for SiPM-based Positron Emission Tomography Imaging Systems.

Area of Science:

• Medical Imaging
• Electronics Engineering
• Nuclear Instrumentation

Background:

• Silicon Photomultiplier (SiPM) arrays are crucial for Positron Emission Tomography (PET) imaging.
• Existing front-end electronics face challenges with signal loss and dark noise.

Purpose of the Study:

• To develop a high-performance current-mode interface chip for SiPM arrays in PET systems.
• To minimize signal loss and effectively suppress dark noise events.

Main Methods:

• Designed a high-speed current amplifier with low input impedance.
• Implemented a novel high-speed threshold detection/comparator circuit.
• Utilized a row-column architecture (RCA) to reduce backend channel count.

Main Results:

• The prototype chip features 64 readout channels.
• Achieved a low input impedance of 20 ohms at 10 MHz.
• Demonstrated a threshold detection propagation delay of 0.3-2ns.

Conclusions:

• The developed ASIC effectively interfaces SiPM arrays for PET imaging.
• The design minimizes signal loss and mitigates dark noise.
• The row-column architecture offers efficient channel reduction for PET systems.