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Observation of Resistive Switching Memory by Reducing Device Size in a New Cr/CrO /TiO /TiN Structure
Debanjan Jana1, Subhranu Samanta1, Sourav Roy1
1Thin Film Nano Tech. Lab., Department of Electronic Engineering, Chang Gung University, 259 Wen-Hwa 1st Rd., Kwei-Shan, Tao-Yuan, 333 Taiwan, ROC.
Abstract:
The resistive switching memory characteristics of 100 randomly measured devices were observed by reducing device size in a Cr/CrO /TiO /TiN structure for the first time. Transmission electron microscope image confirmed a via-hole size of 0.4 µm. A 3-nm-thick amorphous TiO with 4-nm-thick polycrystalline CrO layer was observed. A small 0.4-µm device shows reversible resistive switching at a current compliance of 300 µA as compared to other larger size devices (1-8 µm) owing to reduction of leakage current through the TiO layer. Good device-to-device uniformity with a yield of >85 % has been clarified by weibull distribution owing to higher slope/shape factor. The switching mechanism is based on oxygen vacancy migration from the CrO layer and filament formation/rupture in the TiO layer. Long read pulse endurance of >105 cycles, good data retention of 6 h, and a program/erase speed of 1 µs pulse width have been obtained.
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