Practical Guidelines for Approaching the Implementation of Neural Networks on FPGA for PAPR Reduction in Vehicular

Abdelhamid Louliej1, Younes Jabrane2, Víctor P Gil Jiménez3

  • 1GECOS Lab, National School of Applied Sciences, Cadi Ayyad University, 40000 Marrakech, Morocco. a.louliej@uca.ma.

Summary

This study presents a novel Field Programmable Gate Array (FPGA) implementation using artificial neural networks to reduce power fluctuations in wireless vehicular communications (V2V), improving efficiency and safety.

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